PMOS: gate enabled when input 0, NMOS: gate enabled when input 1
PMOS always between Vdd and output, NMOS always between output and ground
CMOS inverter


CMOS buffer

*TTL vs CMOS



SC1005
Digital Logic
PMOS: gate enabled when input 0, NMOS: gate enabled when input 1
PMOS always between Vdd and output, NMOS always between output and ground
CMOS inverter


CMOS buffer

*TTL vs CMOS


