Uses external pull-up resistor to make output = 1.
Open-drain outputs pull the line to logic low when the internal logic = 0, but they do not actively drive the line high when internal logic = 1.
Multiple open-drain outputs can be connected together as there will not be conflicting signals.
CMOS open-drain:
**if A=B=1, Q1 and Q2 on, Z=0, LED ON. If A=0 or B=0, LED OFF.
**Z = UVW.
Logic gates open-drain:
If any gate is logic low, it pulls the whole line to 0, then X = 0.
If all gates logic high, X = 1
