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Synchronous always block
↑ Year 1 · Semester 1
SC1005
Digital Logic
Synchronous always block
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Basics
Basics
Parity bit
Number conversion
Universality of NAND & NOR gates
Full-adder
Signed-magnitude
1’s complement
2’s complement
Combined circuit for addition and subtraction
Overflow
Parallel addition with registers
Binary Multiplication
BCD addition
Deriving boolean expressions
K-map
CMOS circuit
Circuit characteristics and parameters
Tristate outputs
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Schmitt-Trigger Inverter
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2 TYPES OF CIRCUITS - COMBINATIONAL vs SEQUENTIAL
2 TYPES OF CIRCUITS - COMBINATIONAL vs SEQUENTIAL
Combinational Circuits
Sequential Circuits
Sequential Circuits
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Flip Flops
General Verilog
General Verilog
Combinational always block [always@*]
Synchronous always block
Some sequential blocks
Finite State Machine
Finite State Machine
Remember to assign to reg signal.
Use non-blocking assignment [<=] to synthesise register, order does not matter.
Asynchronous reset:
Synchronous reset:
← Combinational always block [always@*]
Some sequential blocks →
